FFT IMPLEMENTATION OF HARDWARE

Authors

  • Amandeep Arora Department of Electrical Engineering, IIT Delhi, Author
  • Gaurav Nama Department of Electrical Engineering, IIT Delhi, Author
  • Deepak Birt Department of Physics, IIT Delhi Author

Keywords:

FFT, Radi-2, Radix-4, Pipelined Architecture

Abstract

This paper explains various techniques of hardware implementation of Fast Fourier Transform(FFT). FFTnarrows down thousands of computational steps to calculate DFT by simple n*n multiplications to lesser number of steps by exploiting the symmetries in the Fourier terms. Radix-2 and Radix-4 implementations have beenexplained in detail. Further, various constituents of hardware implementation of FFT are explained. ApipelinedFFT architecture for Radix-2 is also mentioned. Other than 2 and 4 radix computations, radix 3 and radix 5canbealso calculated. Mixed radix computations which extend the calculation of FFT for N which are perfect powers of 2 to many possible values of N

Downloads

Published

2016-08-31

Issue

Vol. 3 No. 8 (2016): August

Section

Articles